Inside story of ferroelectric memories.
Vincent Garcia and Manuel Bibes
483279a.pdf (application/pdf Object)
See also the previous entry:
Ferroelectric solid state memories
![](https://blogger.googleusercontent.com/img/b/R29vZ2xl/AVvXsEgaeYG6Bg1NoCrqpQoa0HsAtAlk-iCY0PM_NUJltpi2QTUO_iznvgnFQHHHybiXj8IJtKXNrKNRtlXa-RrqV7_oQaob6CuI4orzoEtWnTx7qWvcMUvXcTM-HqjOrhLDY2NyGBIXAelZ0hXs/s320/Nautre+483%252C+279+%25282012%2529.jpg) |
Binary and multilevel data storage. a, In a classical binary ferroelectric random access memory (FERAM), a bit of information, with a logic value of ‘1’ or ‘0’, is encoded in the up (red block) or down (blue block) polarization direction of the device’s constituent cells. In this 36-bit example, the bits are stored in 6 × 6 cells, each of which stores one bit. Electrical wires (grey) are used to apply voltages across the cells to write and read the cells’ polarization. b, Lee et al.3 describe a multilevel FERAM that can store three bits in a single cell. In this way, three-bit logic states (000, 001, 010, 011, 100, 101, 110 and 111) can be stored in each of 3 × 4 cells of a smaller 36-bit memory array. Each state corresponds to a specific configuration of domains of opposite polarization in the cells. |
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